Skip to content

Author

Bitla Prabhakar T. Satyanarayana

2 papers indexed here

We haven’t gathered this author’s papers yet. Follow them and we’ll fetch their work.

Not the right person? Other researchers publish under this name.

Open access Sep 2026

Frontier-Aware Compensated Truncated Multiplier for Energy-Efficient Edge-AI VLSI Datapaths

A frontier-aware compensated truncated multiplier that removes the lowest partial-product columns while preserving only the boundary, or frontier, column for a compact activity estimator, and shows that frontier compensation remains effective when the truncation boundary is scaled.

Bitla Prabhakar T. Satyanarayana, Dr. Malothu Amru, Dr. Somala Rama Kishore · 0 citations
Open access Sep 2026

Precision-Reconfigurable Zero-Skipping SRAM Compute-in-Memory Architecture for Energy-Efficient Edge-AI Acceleration

This work proposes a Precision-Reconfigurable Zero-Skipping SRAM-CIM (PRZS-CIM) architecture that combines bit-serial exact multiply-accumulate decomposition, 4/6/8-bit precision control, row-level zero gating, and all-zero bit-plane suppression.

Bitla Prabhakar T. Satyanarayana, Dr. Malothu Amru, Dr. Somala Rama Kishore · 0 citations

We use cookies to run the site and, with your consent, for analytics and to show ads. See our Cookie Policy.