Hardware-operable failures (HOFs) interrupt large language model (LLM) training but permit recovery on the same hardware without reset, repair, or replacement. Existing recovery systems nevertheless reload checkpoints, recompute lost progress, and rebuild process state, idling GPUs that could otherwise continue trainin...
Geon-Woo Kim, Joonseok Kim, Daehyeok Kim· 0 citations
Vulcan is proposed, a framework that identifies LLM-friendly interfaces that isolate core decision logic from the rest of the implementation and demonstrates up to 4.9% higher savings for spot-VM scheduling, up to 2% lower miss ratios for cache eviction, and up to 14% higher application performance for tiered-memory sy...
Rohit Dwivedula, Divyanshu Saxena, Sujay Yadalam et al.· 1 citation
PacketExpress is presented, a packet processing architecture that enables networks to leverage large MTUs for Internet traffic without requiring modifications to neighboring networks and introduces F-PMTUD, which determines the path MTU within a single round-trip time without relying on ICMP.
Junghan Yoon, Youngmin Choi, Juyoung Park et al.· Conference on Applications,...· 1 citation
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