Author

Daijing Shi

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Preprint Aug 2026

MCHA: A Memory-Centric Hierarchical Architecture for Parallel-Sequential Computing

The Memory-Centric Hierarchical Architecture (MCHA) is proposed, a reconfigurable hardware solution tailored for parallel-sequential execution that leverages a hierarchical communication strategy that facilitates distributed, inter-core data routing, thereby significantly reducing the bandwidth burden on the global mem...

Daijing Shi, Hongxiao Zhao, Yihan Fu et al. · 0 citations