Open access
Sep 2026
Joint Exploration of Neural Networks and Systolic Hardware for Improved AI Accelerator Performance
This work presents a hardware-aware workflow that combines accurate latency modeling and design space exploration to optimize both neural network architectures and the underlying systolic-array-based accelerator, and demonstrates its approach on ResNet-like networks.
Annina Gutermann, Alexey Serdyuk, Foivos Paraskevas et al.
· Journal of Signal Processing... · 0 citations