Skip to content

Author

Jiaojiao Xu

We have 1 of 1 papers

We haven’t gathered this author’s papers yet. Follow them and we’ll fetch their work.

Not the right person? Other researchers publish under this name.

Open access Jul 2026

Design and Implementation of an OCaml-Based Standalone SystemVerilog Preprocessor Compliant with IEEE 1800-2023

Stagira svpp is presented, a standalone SystemVerilog preprocessor implemented in OCaml and designed to follow the preprocessing semantics of IEEE Std 1800–2023, which provides a reusable reference implementation for studying and validating SystemVerilog preprocessing behavior.

Hao Deng, Zhiqiang He, Yang Liu et al. · 0 citations

We use cookies to run the site and, with your consent, for analytics and to show ads. See our Cookie Policy.