Long-running multi-turn requests accumulate reusable key-value (KV) state. Once this state exceeds a fixed GPU KV-cache allocation, serving systems evict reusable prefixes, repeat prefill work, and may preempt requests. This pressure is particularly acute for Mixture-of-Experts (MoE) models: their expert weights occupy...
Jinpyo Kim, Mingi Kwon, Younghoon Min et al.· 0 citations
HyMCache is presented, a KV-cache framework that integrates CXL-hybrid memory (CXL-HM) for multi-turn LLM serving that uses request-level prefix prefetching and opportunistic write buffering to stage latency-critical reads in device DRAM, enabling DRAM-scale KV-cache efficiency at SSD-level cost.
Hakbeom Jang, Inho Song, Sam H. Noh et al.· arXiv.org· 2 citations· ⚡1
This paper presents HyMCache, a CXL memory rack for multi-turn LLM serving using cost-efficient CXL-hybrid memory, which combines a small amount of in-device DRAM with large SSD-backed capacity behind a CXL interface to efficiently support TB-scale SSD-backed KV reuse.
Hakbeom Jang, Inho Song, Hoshik Kim et al.· 0 citations
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