Formal verification of integer multipliers remains a challenging problem in electronic design automation, as logic-based approaches such as Satisfiability Solvers (SAT) and Binary Decision Diagrams (BDDs) often scale poorly on such circuitry. In recent times, Polynomial Formal Verification (PFV) has been investigated f...
Jan Kleinekathofer, Lennart Weingarten, Kamalika Datta et al.· Forum on Specification and D...· 0 citations
To overcome the state-explosion problem inherent in polynomial expansion, the engine incorporates advanced reduction techniques, including optimized traversal strategies, conflict removal, and polarity-based optimization for compact symbolic representations.
Jan Kleinekathöfer, Lennart Weingarten, Kamalika Datta et al.· 0 citations
This work designs an SCA-based proof engine that exploits a conflict-aware learning approach that compresses the intermediate polynomial expression and successfully verifies circuits that remained unverifiable using previous approaches.
Jan Kleinekath ̈ofer, Lennart Weingarten, Kamalika Datta et al.· 1 citation
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