Address translation is a major bottleneck in data-intensive workloads. TLB prefetching can hide translation latency, but existing spatial prefetchers struggle with irregular accesses, while temporal prefetchers store address deltas in fixed-capacity hardware that cannot scale with application memory footprints. Our cha...
K. Kanellopoulos, Konstantinos Sgouras, Harsh Songara et al.· 0 citations
Operating system (OS) code can account for a substantial share of CPU execution time. First, as application logic is offloaded to heterogeneous accelerators (e.g., GPUs), the CPU increasingly acts as an orchestrator, spending cycles in driver calls, data movement, and synchronization rather than in application code. Se...
Vlad-Petru Nitu, Harsh Songara, Konstantinos Sgouras et al.· 0 citations
GUMPIM is proposed, a PIM system that allows interleaved CPU pages and non-interleaved PIM pages to coexist in a Unitary and Malleable memory space with Guaranteed PIM page allocation and enables zero-copy during PIM task offloading and maintains CPU memory bandwidth while ensuring low PIM offloading overhead.
Yilong Zhao, Fang-Xin Liu, Yi-Wei Hu et al.· ACM Transactions on Architec...· 2 citations
Vinor is presented, a hardware-OS cooperative memory allocation substrate that combines software flexibility with hardware-class performance and full-system simulation further evaluates the programmable allocation engine and six allocation libraries, showing that Valinor provides hardware-class performance without sacr...
K. Kanellopoulos, Spiros Galanopoulos, Konstantinos Sgouras et al.· arXiv.org· 0 citations
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