A Multi-Role Unified Buffer Architecture for an On-Device Vision Transformer Accelerator
This work presents a multi-role unified buffer that dynamically reuses seven banks as input, weight, intermediate, score, and output storage that reduces BRAM36 requirements by 56.3%, while buffer-control and bank-reconfiguration logic accounts for 4.3% of the lookup tables and 5.3% of the flip-flops in the full accele...