A heterogeneous FPGA-GPU system that strategically partitions workloads based on computational characteristics, offload the perception-heavy vision-transformer to GPU while accelerating DAE inference on FPGA through complete on-chip parameter storage in BRAM/URAM.
Zhiheng Chen, Ye Qiao, M. A. Al Faruque et al.· 0 citations
Pragma insertion drives the quality of high-level synthesis (HLS) designs. Choosing the right directives demands expert knowledge and reasoning about loop nesting, data dependences, and memory layout. While existing large language models (LLMs) show promise in code generation, they lack explicit program-structure aware...
Hao-Cheng Xu, Ye Qiao, Phyo Pyae Moe Aung et al.· 0 citations
LowRank-SSM is a hardware-software co-design framework that decomposes the input and output projection weights via post-training truncated SVD and introduces a greedy bandwise rank-allocation algorithm that searches for the per-band rank vector that minimizes weight storage while respecting a user-specified accuracy co...
Hao-Cheng Xu, B. Bhat, Yuseon Chou et al.· 0 citations
A domain-conditional position offset is shown to improve retrieval reranking and domain classification when decisions depend on early in-domain tokens, and to be a lightweight, hot switchable tool for short in-domain scoring and calibration.
Ye Qiao· arXiv.org· 0 citations
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