With transistor sizes continuing to reduce, static power consumption has gradually become a major part of the overall power consumption of Network-on-chip (NoC). Therefore, many power gating methods have been proposed to reduce the increasing static power consumption. However, conventional power gating techniques intro...
Yi-Ming Ouyang, Jing-Yu Chen, Jian-Hua Li et al.· ACM Journal on Emerging Tech...· 0 citations
In the era of Transformers and large language models (LLMs), communication bandwidth has superseded compute capability as the dominant architectural bottleneck. These workloads require frequent aggregated multicast, requiring the simultaneous delivery of distinct data streams to multiple processing element (PE) cluster...
Yi-Ming Ouyang, Lei Chen, Qi Wang et al.· IEEE Transactions on Very La...· 0 citations
Results show that CDCA provides a low-power FPGA design point for DSC acceleration, making it suitable for resource-constrained edge inference scenarios and improving energy efficiency through a dataflow-driven architecture.
Yi-Ming Ouyang, Yuanzhe Jia, Jian-Hua Li et al.· Journal of Supercomputing· 0 citations
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