Distributed transactions on CXL memory pools allow hosts to directly access shared data, bypassing message-based coordination. However, the limited cross-host hardware cache coherence (HCC) in CXL hinders synchronization for consistency and concurrency control across large memory pools. To overcome this limitation, we...
Zhi-Jun Yang, Yu Hua, Ming Zhang et al.· Proceedings of the ACM SIGOP...· 0 citations
Fail-slow hardwares are still running and functional, but in a degraded mode, thus slower than their expected performance. Bugs triggered by fail-slow hardwares cause severe cloud system failures. Existing testing tools fail to efficiently detect these bugs due to overlooking their characteristics. In order to address...
Gen Dong, Yu Hua, Yongle Zhang et al.· ACM Transactions on Computer...· 0 citations
A differential analysis framework that attributes a failure or regression to a skill by comparing a target skill-guided run against a no-skill or semantically matched skill reference run that solves the same task, or solves it more cheaply.
Gen Dong, Yanjie Gao, Li-Qun Li et al.· 8 citations· ⚡1
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