Preprint
Jul 2026
VClare: Resolving Imperfect Specifications in LLM-Based Verilog Generation
The first systematic study of imperfect specifications is presented and an automated framework to repair them to enhance the quality of resulting Verilog design is proposed, demonstrating the capabilities of specification repair by {VClare} as well as further potential of LLMs in front-end hardware design.
Zhuorui Zhao, Bing Li, Yu Li et al.
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