Open access
Jul 2026
Design and Implementation of an OCaml-Based Standalone SystemVerilog Preprocessor Compliant with IEEE 1800-2023
Stagira svpp is presented, a standalone SystemVerilog preprocessor implemented in OCaml and designed to follow the preprocessing semantics of IEEE Std 1800–2023, which provides a reusable reference implementation for studying and validating SystemVerilog preprocessing behavior.
Hao Deng, Zhiqiang He, Yang Liu et al.
· Electronics · 0 citations