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P‐3.7: A Pipelined Hardware Implementation of a Pyramid‐Fusion Enhancement Method for Weakly Illuminated Images

Aug 2026 · SID Symposium Digest of Technical Papers · Vol 57, pp. 1112-1113 · 0 citations · 8 references

TL;DR

By enabling high‐throughput, singleframe stream processing, the design effectively mitigates the latency and performance bottlenecks associated with softwarebased implementations, making it well suited for real‐time embedded vision applications.

Abstract

Images captured under weak illumination often suffer from severe visual degradation, typically characterized by low brightness, reduced contrast, and obscured details. Consequently, effective enhancement of weakly illuminated images, such as those acquired in backlit or nighttime environments, is essential for reliable visual perception in applications including surveillance and autonomous navigation. Advanced software algorithms, such as multi‐scale pyramid fusion method, can achieve impressive enhancement performance, their high computational complexity and extensive nonlinear operations render them unsuitable for real‐time, low‐power embedded systems. To overcome these limitations, this paper presents a fully pipelined hardware implementation of a multi‐scale pyramid fusion enhancement algorithm for weakly illuminated images. The proposed architecture is implemented in Verilog and verified using the Vivado Simulator. By enabling high‐throughput, singleframe stream processing, the design effectively mitigates the latency and performance bottlenecks associated with softwarebased implementations, making it well suited for real‐time embedded vision applications.

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