Analysis of entanglement distillation and entanglement swapping at the level of the elementary building blocks of noisy quantum repeater networks provides instructive insights into the link-level principles that govern larger-scale architectures.
Abstract
Entanglement distillation and entanglement swapping have been extensively studied assuming perfect quantum memories. However, near-term quantum networks will be fundamentally limited by quantum memories with a finite coherence time, resulting in complex choices for the timing and ordering of these operations. In this work, we study entanglement distillation and entanglement swapping at the level of the elementary building blocks of noisy quantum repeater networks, with the goal of elucidating the fundamental tradeoffs induced by memory decoherence. First, we focus on a minimal one-hop setting, where we analytically compare ``distill-as-soon-as-possible''and ``distill-as-late-as-possible''strategies against a baseline strategy that simply discards the older entangled state. We find that in the low memory coherence time regime, discarding the older entangled state achieves higher expected output fidelity, while in the high coherence time regime, delaying distillation until the end achieves the highest expected output fidelity and, over most of the deadline range, the highest weighted coherent information, at the expense of a lower success probability. We then extend our analysis to two-hop repeater chains using Monte Carlo simulation. In this setting, we find that the highest weighted coherent information is achieved by strategies that defer distillation to the end of the time window, with \textsf{Distill-ALAP-then-Swap-ALAP} and \textsf{Swap-ASAP-then-Distill-ALAP} leading at different operating points, while \textsf{Discard-Oldest-then-Swap} never reaches positive weighted coherent information in any regime tested. Together, these results clarify how decoherence reshapes the optimal operation timing in quantum networks and provide instructive insights into the link-level principles that govern larger-scale architectures.
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