From Timing Budgets to WCETs: Robust SIL-and BSW-Aware Clustering and Allocation for Iterative Automotive Software Development

Dependency-Aware Over-the-Air Framework for Reliable Software-Defined Vehicle Updates

A dependency-aware OTA orchestration framework that addresses challenges in improving update success rates, efficiency in execution time and update requests through optimized scheduling, and feasibility in maintaining system-wide integrity by successfully reconciling stringent safety requirements and diverse update sensitivity constraints is proposed.

SAP-LCLS: Converting Structural Slack Into Commit-Time Recovery Budget for Heterogeneous Loosely-Coupled Lockstep

Automotive functional-safety systems require high fault-detection and recovery capability under constrained core cost, but DCLS remains fail-silent on faults and TCLS requires the cost of a third physical core. This paper reuses the Hardware Security Module (HSM)-side auxiliary core available in modern automotive MCUs as a safety-execution resource and constructs heterogeneous LCLS; in our RTL platform, this role is implemented with SCR1. In such core pairs with different ISAs, microarchitectures, and performance characteristics, completion-time skew arises structurally. This paper proposes SAP-LCLS, which converts the Structural Slack induced by this performance asymmetry into a Preemptive Recovery Budget. The proposed Lockstep Management Unit (LMU) bounds commit-time decision latency to payload-length-independent $O(1)$ through streaming CRC signatures and accepts re-execution results without additional payload SRAM beyond the baseline DMR result window through a Signature-Preserving and Payload-Overwriting Policy. It also aborts unnecessary re-execution early on the normal path. If HSM/SCR1-side delay prevents primary 3-way evidence from being available by the latest safe decision point, the LMU permits a limited Temporal Dual Modular Redundancy (T-DMR) degraded commit only when the Leader first-run and re-execution signatures match. RTL evaluation under the stated single-task commit model and a single effective transient fault that propagates to a commit-target payload mismatch shows that SAP-LCLS on an Arm Cortex-M3/RISC-V SCR1 platform reduces normal-path decision latency by 13.1% on average and fault-recovery latency by 27.2% on average, with a maximum reduction of 43.4%, compared with the SW full-compare baseline. The core LMU control logic synthesizes to 23.1% of the area of a Cortex-M3-class core. These results show that SAP-LCLS can jointly provide commit-path scalability, reduced recovery latency, and limited hardware overhead in cost-constrained automotive MCUs.

A Lightweight Verification Framework for RISC-V SoCs Based on RTL Lint and Differential Testing

From Architecture to Binary: Ensuring Cross-Domain Consistency in Model-Based Airborne Software Development

This paper presents an airborne software development approach for manned and unmanned aerial vehicles aimed at reducing inconsistencies across system, model-based functional, and embedded software domains. In environments influenced by standards such as ARP-4754B and DO-178C, these inconsistencies typically stem from insufficient enforcement across domain boundaries rather than missing process definitions. Building on a previously proposed toolchain centered on a relational interface database, we identify recurring failure modes and propose a repository-centered implementation to address them, tailored to small, resource-constrained teams operating without heavyweight process overhead. Each domain is assigned a primary repository with cross-repository references and dedicated CI pipelines that generate, update, and validate the exchanged artifacts. Automated interface updates, differential change notifications, and consistency checks propagate changes with minimal manual effort and surface inconsistencies before the time-consuming code-generation and compilation steps. An initial implementation in an ongoing experimental project is described, with qualitative feedback from its early use.

Accelerating Safety-Critical Automotive Software Development Through Reproducible AI-Assisted Requirements Engineering

The results indicate that language-model assistance can add value in regulated automotive requirements workflows when it is embedded in deterministic, provenance-rich, and expert-governed processes.

When to Trust the Map: Confidence-Aware LLM Routing for Automotive CVE-to-ATM Mapping

Public CVE descriptions report the technical conditions and impact of vulnerabilities, whereas the Auto-ISAC Automotive Threat Matrix (ATM) expresses an adversary's tactics and techniques. Because the two representations are not directly aligned, incorrect automated mappings in safety-critical environments may distort threat interpretation and mitigation prioritization, motivating a confidence-aware approach that distinguishes auto-confirmable mappings from uncertain cases. This paper reformulates automotive CVE-to-ATM mapping as a selective automation problem. The proposed framework generates candidate mappings via hierarchical in-context learning, then fuses self-consistency and LLM-based evidence verification signals into a calibrated meta-model. The resulting calibrated confidence score routes each candidate into AUTO, REVIEW, or HOLD. On the evaluation set, the proposed system substantially improved candidate-set precision at matched recall over a Flat zero-shot GPT-5.2 baseline. In the High-Confidence operating mode, the AUTO tier achieved a precision of 0.878, more than double the candidate-set base rate, and the calibrated confidence score achieved an AUROC of 0.868 in distinguishing correct from incorrect candidates. These results show that the framework can support selective automation by isolating auto-confirmable mappings from those requiring analyst review.