Sep 2026· IACR Transactions on Cryptographic Hardware and Embedded Systems· 0 citations· 26 references
TL;DR
This work presents the first high-throughput GPU implementation and evaluation of MAYO, covering Keygen, Signing, and Verification, and introduces a data reuse-aware computation model for matrix-dominated and memory-access-bound workloads, and proposes Reuse Matrix Multiplication Evaluation (RMME) to reduce redundant global memory accesses through operand-level data reuse.
Abstract
With the rapid development of quantum computing, traditional digital signature schemes face increasing security threats. MAYO is a post-quantum digital signature scheme based on the hardness of the multivariate quadratic problem. Owing to its compact signature size, reduced public key, and flexible parameter sets, it has emerged as a competitive candidate in the NIST Additional Digital Signature round. However, existing MAYO implementations primarily target general-purpose processors, SIMD-enabled CPUs, or embedded platforms, and their throughput remains insufficient for high-demand scenarios such as server-side verification and largescale authentication services. In this work, we present the first high-throughput GPU implementation and evaluation of MAYO, covering Keygen, Signing, and Verification. We introduce a data reuse-aware computation model for matrix-dominated and memory-access-bound workloads, and propose Reuse Matrix Multiplication Evaluation (RMME) to reduce redundant global memory accesses through operand-level data reuse. Building upon this method, we further develop a GPU-oriented hardware– software co-design framework that combines algorithmic restructuring, warp-level kernel design, task-level memory reuse, and asynchronous multi-stream execution to maximize end-to-end throughput. Across all four MAYO parameter sets, the proposed implementation achieves more than 700x higher Signing throughput and more than 600x higher Verification throughput than CPU-based implementations. In the best case, it supports millions of verifications per second. These results demonstrate that RMME, together with GPU-oriented hardware–software co-design, is highly effective for accelerating multivariate signature schemes and provides a practical high-throughput solution for post-quantum digital signatures.
With the ongoing standardization of Post-Quantum Cryptography (PQC), polynomial multiplication in lattice-based cryptographic schemes has emerged as a critical performance bottleneck. The Number Theoretic Transform (NTT), as the core technique for accelerating such computations, plays a decisive role in determining the...
Qing-Xin Xie, Li-Ping Wang, Xiao Liu et al.· International Test Conferenc...· 0 citations
This work presents a hardware-oriented design for accelerating the Monolith hash function on FPGA and proposes a dual-architecture framework consisting of a serial architecture and a parallel architecture to address different performance and resource constraints.
Cheng Chen, Gang-Qiang Yang, Hong-Chao Zhou et al.· ACM Transactions on Reconfig...· 0 citations
S2MM is presented, the first scalable FPGA-based accelerator designed for HE MM, and a novel datapath for Homomorphic Linear Transformation (HLT), the dominant workload in HE MM is proposed, enabling fine-grained on-chip data reuse and substantially reducing both off-chip memory traffic and on-chip memory demand.
Zhi-Han Xu, Rajgopal Kannan, Viktor K. Prasanna· ACM Transactions on Reconfig...· 0 citations
To address high latency and parameter heterogeneity in post-quantum cryptography, this paper proposes a scalable hardware acceleration scheme. To mitigate the polynomial multiplication bottleneck, we introduce the 2 Preprocess-then-NTT (Number Theoretic Transform) architecture. By decomposing complex polynomial transfo...
Bin Li, Bo-Yao Hu, Shi-Liang Yu et al.· International Test Conferenc...· 0 citations
A unified perspective on the performance bottlenecks and design trade-offs of FPGA-based FHE accelerators is provided and offers practical guidance for future architecture development.
Lingyu Gong, Farhad Merchant· ACM Transactions on Reconfig...· 0 citations
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