TL;DR
These CNN models employing the proposed AM are able to gain better classification accuracy in both image and audio types of data sets than models that are trained considering existing AMs, demonstrating the appropriateness of the proposed design for error-tolerant and high-performance computing.
Experimental results indicate that the proposed multiplier provides favorable accuracy–efficiency trade-offs and application-level validation using image multiplication and image convolution further demonstrates improved perceptual quality measured through PSNR and SSIM.
This article proposes high-performance simplified approximate adders through logic-level reduction using the Cadence Genus Synthesis Solution at the 45 nm technology node and demonstrates enhanced error characteristics compared with existing designs.
A frontier-aware compensated truncated multiplier that removes the lowest partial-product columns while preserving only the boundary, or frontier, column for a compact activity estimator, and shows that frontier compensation remains effective when the truncation boundary is scaled.
This work presents a suitable design as well as implementing a reconfigurable 32-bit Multiply-Accumulate (MAC) unit based on a hybrid approximate adder architecture aimed at energy-efficient VLSI applications. The proposed design partitions the adder into three segments according to bit significance: an 8-bit approxima...
This paper aims to showcase an in-depth study of a stochastic system that could be used in complex systems rather than going for traditional methods. A stochastic system works with an approximation technique where exact accuracy may be moderately compromised compared with a conventional binary system, but even though w...
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