Duet: Orchestrating Full-Duplex-Aware Proactive Demotion in CXL Tiered Memory

Abstract

Tiered memory systems integrating local DRAM with CXL-attached expanders must dynamically orchestrate data placement to accommodate diverse access patterns while maintaining stringent application latency requirements. Proactive demotion is essential for sustaining fast-memory headroom; however, current strategies treat interconnect bandwidth as a monolithic resource—a legacy assumption predicated on half-duplex memory architectures. Consequently, these approaches often trigger severe performance degradation during demand spikes as demotion (write) traffic contends with critical read paths on the shared bus. This paper introduces Duet, a tiered memory management system orchestrating a Duplex-aware eviction technique. Unlike solutions constrained by shared-channel assumptions, Duet exploits the inherent full-duplex nature of the CXL-over-PCIe interconnect to explicitly decouple read and write traffic. Duet introduces the Duet-region (D-region), a novel management abstraction aligned with application allocation units, capturing intrinsic spatial locality while minimizing metadata overhead. By modeling the CXL link as independent unidirectional channels, the Duet scheduler opportunistically utilizes downstream (write) bandwidth for proactive demotion without obstructing the upstream (read) path required for low-latency accesses. We implement Duet within Linux kernel v6.14.0 and evaluate it on a physical dual-socket server equipped with 5th Gen Intel Xeon processors and commercial CXL 2.0 memory expanders. Empirical results across a diverse suite of benchmarks and production traces demonstrate that Duet achieves a geometric performance improvement of approximately 75% over standard reactive baselines (TPP, DAMON) and a decisive 22.6% gain over the state-of-the-art proactive scheme (PET), while maintaining exceptional execution stability.