An Efficient Optimization Design Method for Signal Integrity of 3-D Integrated Circuits With Quasi-Coaxial TSV Arrays

Abstract

Due to the crosstalk and electromagnetic interference (EMI) in 3-D integrated circuits, signal integrity degradation remains a critical bottleneck. To address the inefficiency of full-wave electromagnetic simulation and optimization design, the high-efficiency optimization design method for quasi-coaxial through-silicon via (TSV) arrays is proposed to enhance signal integrity in interference-prone environments. To replace time-consuming full-wave electromagnetic simulations, a stacked autoencoder (SAE) surrogate model is developed and trained on 2401 orthogonal HFSS datasets, achieving a prediction R2 of 0.93 and a 150  $000\times $ speedup. Then, the SAE model is integrated into a two-step global–local particle swarm optimization (PSO) algorithm to perform multiobjective optimization under three representative scenarios (balanced, low-frequency prioritized, and high-frequency prioritized). The simulation verifications indicate a maximum relative error of 2.38% compared with the full-wave HFSS simulation. In addition, the experimental results across three fabrication batches indicate an overall R2 of 0.9825 for the S-parameter predictions from the SAE model. Moreover, the compatibility with 12-in TSV manufacturing has been confirmed. Therefore, the proposed method combines accuracy and efficiency, which is suitable for 3-D integrated circuits design in uncrewed systems, aerospace, robotics, and 6G applications.