Jul 2026· International Conference on Control, Decision and Information Technologies· pp. 2029-2034· 0 citations· 14 references
Abstract
The growing incorporation of deep learning into autonomous robotic systems has highlighted the importance of efficient inference on resource-constrained edge platforms. Moreover, License Plate Detection (LPD) is a key component of intelligent transportation systems, requiring high accuracy and real-time performance for practical deployment. However, deep learning detectors often remain computationally demanding for edge devices with limited resources. This paper proposes an edge-oriented optimization framework for YOLOv8-based LPD, combining structured pruning, INT8 quantization. Extensive experiments evaluate the trade-off between accuracy, computational complexity, and inference latency. Results show that combining pruning and quantization significantly reduce model size and computational cost while preserving detection performance. The optimized model achieves real-time inference exceeding 100 FPS on an Intel CPU, demonstrating its suitability for resource-constrained edge environments. These findings confirm that hybrid compression strategies enable efficient deployment of deep learning–based LPD systems in real-world applications.
The proposed hybrid pipeline includes structured pruning, INT8 quantization and task-specific knowledge distillation, which is benchmarked against standalone methods and reinforces the idea of upper bound projection based approach for accuracy-oriented, multi-level compression.
Krishna Kumar Tiwari, Komal Tahiliani, Uma Shankar Birthare et al.· International journal of com...· 0 citations
Findings confirm that combining complementary compression strategies yields substantially better performance-efficiency trade-offs than any single technique applied in isolation.
Upma Sharma Archana· International Journal of Res...· 0 citations
Applied Artificial Intelligence (AI) is increasingly used in emerging autonomous systems such as self-driving vehicles, drones, and robotics, where perception and decision-making rely on deep learning models, notably Convolutional Neural Networks (CNNs). These applications operate under strict timing constraints, as meeting inference deadlines is essential to ensure efficiency, safety, and robustness in dynamic environments. To accelerate inference on embedded platforms, GPUs are progressively being replaced by Neural Processing Units (NPUs), which are better suited to resource-constrained environments. However, NPU architectures are typically throughput-oriented, rely on non-preemptive execution, and lack native real-time guarantees. As a result, their timing behavior is difficult to predict, significantly complicating their integration into real-time autonomous systems and the enforcement of end-to-end deadline constraints. Moreover, existing real-time simulation and scheduling analysis tools fail to accurately capture the specific execution characteristics of CPU–NPU architectures, particularly the layer-level execution of CNNs and the possible parallel execution of layers belonging to different CNNs. Consequently, system designers lack appropriate tools to explore scheduling strategies and assess system-level schedulability under realistic architectural constraints. To address these challenges, we propose npsim, a tick-accurate CPU–NPU simulator dedicated to the scheduling analysis of CNN-based applications. npsim models the detailed timing behavior of heterogeneous AI workloads, including non-preemptive NPU execution, data-transfer delays, and layer-level CNN execution. It provides a realistic environment for exploring scheduling policies and analyzing the trade-off between CNN result accuracy and system schedulability. Its lightweight design further enables easy integration into the development workflow of commercial NPUs, such as the NXP Neutron NPU.
Mourad Dridi, Görkem Salman, Burak Bastug et al.· International Conference on...· 0 citations
Experimental results demonstrate that effective compression significantly reduces model size and computational cost with minimal performance loss, highlighting the importance of compression-aware design and concluding as a valuable reference for building efficient and scalable AI systems.
Daniel Rodríguez· International Journal of App...· 0 citations
In the quest for advanced autonomy and real-time data analysis, microsatellites such as CubeSats increasingly rely on embedded machine learning (ML) to meet demanding mission objectives. However, the limited power, memory, and processing resources on these platforms introduce significant challenges to algorithm design, performance, and reliability. This review provides a comprehensive examination of the state of the art in ML for microsatellites, highlighting the constraints inherent in low-power hardware and identifying strategies to overcome them. We begin by exploring model compression, lightweight architectures, and specialized software frameworks—including reusable, flight-software-integrated deployment approaches—that enable efficient onboard inference. Commercial off-the-shelf (COTS) hardware options—ranging from microcontrollers and Field-Programmable Gate Arrays (FPGAs) to System-on-Chip (SoC) devices with integrated Graphics Processing Units (GPUs)—are then discussed, emphasizing their relative merits and trade-offs under Size, Weight, and Power (SWaP) constraints. Drawing on a survey of key missions and research efforts, we outline the most compelling current and future applications, including autonomous navigation, Earth observation, and data filtering. We conclude with a timeline of notable ML-enabled CubeSat missions, synthesizing lessons learned and pinpointing open research issues, such as resilience to radiation, extreme model compression, and standardization. By unifying these insights, the review illuminates practical paths for designing robust, energy-efficient, and mission-ready ML solutions for space environments.
Mohammed E. Eshaq, M. Sami Zitouni, J. Zabalza et al.· IEEE Access· 0 citations
The deployment of deep learning-based vision systems on edge devices introduces a complex trade-off between computational efficiency and detection accuracy. In this work, we investigate this trade-off in the context of a multi-stage Automatic License Plate Recognition (ALPR) pipeline, evaluated in two heterogeneous edge execution environments: a general-purpose Raspberry Pi 5 single-board computer and the ARTPEC-8 system-on-chip integrated into an Axis smart camera, where neural network inference is accelerated by the on-chip DLPU. All experiments were performed using pre-recorded images loaded from the file system; neither the Axis camera sensor nor a live video stream was used. This study evaluates the impact of model architecture, numerical precision, and input resolution on both inference latency and detection performance. YOLOv5- and YOLOv8-based models were analyzed under multiple quantization schemes (FP32, FP16, dynamic, and INT8), while a cross-platform benchmark was conducted to assess the benefits and limitations of hardware acceleration. The results show that dedicated accelerators provide significant latency reduction at higher resolutions; however, this advantage is accompanied by reduced flexibility and increased sensitivity to quantization effects. In contrast, CPU-based execution enables the use of more recent and quantization-robust model architectures, which can partially compensate for the lack of hardware acceleration when combined with resolution scaling. Furthermore, the analysis hig ights the importance of hybrid-resolution processing in multi-stage pipelines, where different stages can operate at different input resolutions to balance accuracy and performance. The findings demonstrate that optimal system design requires a joint consideration of hardware characteristics, model architecture, and quantization strategy, rather than relying on a single optimization dimension. The presented results provide practical insights for the design of efficient and robust edge-based ALPR systems, with direct implications for real-world industrial deployments.
E. Burkus, Bence Lestyán, Lehel Dénes-Fazakas et al.· Italian National Conference...· 0 citations