A New Binary Search Based ADC Architecture

Abstract

This paper proposes and demonstrates a new ADC (Analog-to-Digital Converter) architecture based on a binary search strategy. The proposed topology uses a single voltage divider to generate the reference for comparison with the input sample. Depending on the comparator’s output, the maximum or minimum levels of the voltage divider is updated accordingly, generating a new reference. The resulting circuit is simple, with few components and only two resistors for any bit precision. We present a proof-of-concept breadboard implementation with off-the-shelf components. The experimental results exhibit a consistent behavior with respect to mathematical simulations. In addition, this paper presents a clear description of the circuit operation, supported by a mathematical analysis that enables its design and implementation.