S2PAR: Scalable Surface Code Ancilla Routing Card for Distributed Fault-Tolerant Quantum Computing

Abstract

The surface code is a leading quantum error correction candidate for fault-tolerant quantum computing. Within this framework, Pauli-based computation eliminates Clifford gates at the cost of higher-weight multi-qubit operators that require large ancilla patches. The dominant bottleneck for scaling such systems across distributed compute modules is the resulting routing overhead: in conventional planar layouts—monolithic chips or homogeneous grids of tiled modules—ancilla path lengths scale with system distance, contributing significantly to the logical error budget. This raises a central question for distributed quantum computing: how can we build scalable systems that escape planar routing overhead? This work introduces S2PAR (Scalable Surface Code Ancilla Routing Card), a heterogeneous architecture in which a dedicated routing card serves as a parallel communication fabric for the distributed quantum compute modules it interconnects. S2PAR replaces distance-dependent planar routing with fixed-latency remote operations mediated by Bell pairs, establishing virtualized connectivity that bounds the effective distance between logical qubits and strategically exchanges scaling error for a fixed-cost “seam” error at module interfaces. The architecture composes hierarchically: interconnected routing cards support multi-hop entanglement routing for arbitrary-range connectivity in fixed time. The co-design extends to the compilation pipeline, where Pauli-based circuits are scheduled across the routing card and compute modules concurrently, exposing parallelism between independent operations. We develop a high-level error model fitted from extensive STIM simulations across logical primitives under varied noise conditions. The cost of remote seams is modest compared to the penalty of long ancilla paths in planar topologies. Applying the model to QFT, Adder, and Ising benchmarks, S2PAR significantly reduces total logical error relative to planar baselines, with improvements of up to 35.1% (Adder) and 56.4% (Ising) even when inter-chip links are ten times noisier than local gates. S2PAR will be fully open-sourced as a hybrid parallel/quantum design-and-evaluation toolchain, supporting future research in distributed quantum compilation.