Sep 2026· Advances in Materials· pp.
e74987
· 0 citations· 31 references
Medicine
Abstract
Physical reservoir computing offers an energy-efficient framework for spatiotemporal processing by exploiting nonlinear dynamics and fading memory. Two-dimensional semiconductors provide intrinsic interfacial charge-trapping dynamics as a potential source for such behaviors. However, purely defect-driven reservoirs suffer from limited tunability and variability. Here, we demonstrate a ferroelectric-assisted charge-trap memory (FA-CTM) that transforms inherently random interfacial charge dynamics into a highly controllable, designable physical reservoir. By introducing a ferroelectric underlayer and engineering voltage partitioning via capacitance matching, the FA-CTM is intentionally driven in a volatile regime that strengthens nonlinearity while preserving reproducible fading-memory behavior. This architecture achieves a 51% enhancement in the memory window together with a 12-fold increase in on-current compared to pristine dielectric counterparts. Through an industry-academia partnership, we validated array-level scalability using 8-inch wafer-scale MOCVD-synthesized MoS2 channels integrated via dry transfer processes. The result exhibits exceptional uniformity, with average reservoir state output-current variation minimized to 3.11%, compared to 15.57% in non-ferroelectric controls. Consequently, the FA-CTM reservoir achieves 90.18% accuracy on EMNIST classification and supports a multitasking pipeline for video-based object recognition and trajectory prediction. These results establish ferroelectric-assisted field control as a practical method to co-optimize tunability and uniformity in charge-trap memories, providing a robust foundation for spatiotemporal processing.
Ferroelectric materials are highly attractive for low-power, high-speed electronics and emerging neuromorphic computing architectures. However, the severe physical scaling limits of conventional bulk (3D) ferroelectrics at the nanoscale have shifted attention towards two-dimensional (2D) ferroelectric monolayers. Accur...
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Neuromorphic hardware that unifies sensing, memory, and learning at the device level remains challenging due to limited optoelectronic comodulation and rigid architectures. Here, we report a flexible, van der Waals (vdW)-integrated MoS2/hexagonal boron nitride (h-BN)/graphene memtransistor in which defect-mediated in...
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Ferroelectric memories have emerged as promising candidates for nonvolatile memory and neuromorphic computing owing to their capability for direct channel modulation through polarization switching. However, the high thermal budget required for synthesis and post-annealing processes hampers scalable integration and degr...
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Ferroelectric tunnel junctions (FTJs) hold great promise for neuromorphic computing due to their advantages of low energy consumption, high speed, and nonvolatile multi‐level resistance states. However, achieving a programming voltage below 1 V in FTJs, a critical requirement for neuromorphic computing, is hindered...
The von Neumann bottleneck limits energy-efficient computing. While ferroelectric hafnium zirconium oxide (HZO) memories are promising for in-memory computing, achieving high speed, endurance, and reliable multilevel control remains challenging. This work addresses these challenges through interfacial engineering with...