TMR-driven resistive switching for neuromorphic computing: a DFT study on magnetic carbon chains
Abstract
Inspired by modern artificial intelligence paradigms based on adaptive multi-level resistive synaptic weights, engineering multi-resistive states via spin-dependent quantum transport offers a viable route toward integrated memory–computation architectures. multilevel resistive nanochip integrated with spin-dependent quantum transport provided tunable resistive memory states, ultra-low power operation, and native compatibility with neuromorphic computation. In this work, we propose a tunneling magnetoresistance-driven spintronic resistive memory nanochip consisting of a magnetic-centered heptameric carbon chain sandwiched between edge-coved zigzag graphene nanoribbon electrodes in a two-probe configuration. The device is investigated using the density functional theory in the framework of non-equilibrium Green’s function formalism, enabling a spin-resolved description of quantum transport. Multi-level resistance states are realized through both collinear and non-collinear spin mechanisms. Our results indicate that non-collinear spin engineering leads to a smaller average synaptic-weight transition (0.2440) compared to the collinear method (0.320), suggesting a more refined and gradual modulation of weights during spin-controlled programming. Transmission spectra, projected device density of states, and molecular projected self-consistent Hamiltonian analysis are used to further confirm the transport characteristics. In addition, the rotation-dependent energy landscape reveals energetically distinguishable programmed spin states separated by finite transition barriers, thereby supporting stable multilevel memory operation with enhanced thermal robustness. The corresponding cyclic modulation of normalized synaptic weights over the full 360∘ rotational cycle further demonstrates reversible write–erase functionality and continuous analog synaptic programming. These findings establish spin-engineered multi-resistive nanochips as promising candidates for scalable, energy-efficient neuromorphic computing hardware and advanced in-memory processing systems.