OctaPE: A Flexible PE Architecture for Multi-Dataflow Edge AI Acceleration

Abstract

Deep Neural Network (DNN) accelerators based on systolic arrays have gained popularity as an efficient method of accelerating GEMM-intensive operations. However, because fixed dataflow a rchitectures and heterogeneous DNN workloads are incompatible, traditional systolic systems have low PE utilization. This work introduces omnidirectional PE with a lightweight switch-based interconnect enabling flexible multi-dataflow execution for irregular GEMM workloads called OctaPE. It allows different data flows, such as Output Stationary (OS), Input Stationary (IS), and Weight Stationary (WS), and supports data movement in eight directions. A high-speed pipelined CORDIC multiplier is integrated into the proposed architecture to increase computing efficiency and throughput for irregular GEMM operations. The proposed design uses only 332 LUTs and achieves an operating frequency of 312 MHz, according to FPGA-based hardware emulation on the Basys3 Artix-7 platform (xc7a35tcpg236-1). This results in nearly 24.7× lower LUT utilization and 2.4× higher speed compared to existing designs. With an 84.4% area reduction and a 66.65% latency reduction over prior work, ASIC synthesis in a 28 nm technology node further demonstrates notable advancements. Additionally, to confirm computational accuracy, software-level functional validation is carried out using Python 3.0 and the QKeras 2.3 framework.