ANALYSIS OF THD, RMS OUTPUT VOLTAGE AND VOLTAGE STREE ACROSS SWITCHING DEVICE FOR 1500V DC BUS THREE LEVEL ANPC INVERTER

Abstract

Multilevel topologies have been used more frequently for high voltage applications in order to produce a staircase voltage waveform with total harmonic distortion (THD). This has increased interest in high-power systems and prompted the continuous development of advanced topologies. This paper discusses the advantages of the active neutral point clamp (ANPC) topology over neutral point clamp (NPC), flying capacitor neutral point clamp (FCNPC) and T-type neutral point clamp (TNPC) topologies for a 1500V direct current (DC) bus, focusing on superior loss distribution, elimination of passive clamping components, and the ability to utilize lower-voltage-rated switches. To investigate the THD for three-level ANPC inverter, a number of pulse width modulation (PWM) approaches based on carrier wave and reference-wave modification are applied. Phase opposition pulse width modulation (PODPWM), phase disposition pulse width modulation (PDPWM), and alternative PODPWM (APODPWM) and phase-shifted PWM (PSPWM), triangle saturated clamp mode PWM (TSCMPWM) are evaluated based on the carrier signals phase arrangement. The bus clamping PWM (BCPWM), trapezoidal triangle PWM (TRPWM), third harmonic injected PWM (THIPWM), three-phase sinusoidal signals with a 13th harmonic signal PWM (THISDPWM) are addressed based on the modification by inserting an additional signal into the sinusoidal wave to obtain the new reference wave. Also, the parasitic inductance model of ANPC topology is simulated. To use a 1200 V switching device, the most efficient PWM technique for a 1500 V DC bus three-phase three-level ANPC inverter is determined by comparing the root mean square (RMS) value of phase voltage, THD and peak voltage across the switching device. PSIM software has been used to simulate a three-level inverter using various PWM techniques.