ASIC implementation of an LSTM neural network

Abstract

Neural networks are widely used in various applications due to their ability to learn complex patterns fromlarge volumes of data. The increasing adoption of AI algorithms is primarily attributed to the fact that neural networks can model complex nonlinear relationships between variables,making them ideal for problems where traditional approaches fail to capture data dynamics. In this context, there is a natural demand for solutions that accelerate processing and improve the reliability of the information produced by neural networks. This work presents the development of a Long Short Term Memory (LSTM) neural network implemented directly in hardware, following a full ASIC design flow. The proposed approach aims to improve energy efficiency and reduce latency in applications that require sequential processing, such as time series forecasting. The LSTM architecture was described in Verilog and organized into functional modules that perform the core operations of the network, including matrix multipli cations, nonlinear activations, and data flow control. To vali date the approach, the network wasapplied to theprediction of the closing price of the Bitcoin cryptocurrency and compared to software-based implementations. Despite an average percentage error of 4.38% compared to CPU and GPU versions, the ASIC solution proved to be highly efficient. The ASIC based LSTM implementation achieved a 323× speedup in execution time compared to the CPU and GPU software versions. In terms of power, after physical synthesis, the ASIC implementation demonstrated promising results, with a total power consumption of 15.33 mW. Thelatency per LSTMcellwas95.7 ns, and the maximum throughput achieved was 10.5 Mops/s. The work concludes by emphasizing that, with targeted ad justments, the proposed model can be scaled and adapted to a variety of real-time inference applications