Development Flow of a Digital Signature Cryptographic Controller with FPGA Verification and MPW Prototyping

Abstract

This article proposes and experimentally validates a formalized development flow for a specialized cryptographic controller designed for hardware implementation of electronic digital signatures. The proposed flow is a methodology encompassing the full development cycle – from architectural design to project preparation for MPW production. The controller architecture is based on a modular principle, whereby the system consists of functionally independent hardware blocks developed and verified as individual modules. Each module undergoes RTL implementation, hardware abstraction layer development, and hardware verification during FPGA prototyping. Critical modules are subjected to hardware verification and physical validation within the MPW pipeline. Following modular verification, the blocks are integrated into the system, the final memory map is generated, and system hardware verification is conducted. Experimental validation of the methodology was carried out on a TinyQV demonstration computing module compatible with the RISC-V architecture. Hardware verification was executed on the GOWIN Tang Primer 20K FPGA platform, and the physical implementation was realized in the TinyTapeout platform MPW flow using the SkyWater SKY130 PDK. The results confirm the reproducibility of the proposed development path and its applicability for creating specialized cryptocontrollers for information security and embedded systems.