Extending the Life of HPC Systems in Resource Constrained Environments: Mapping Productivity-Energy Trade-offs in Memory-Bound Workloads via DVFS and Core Scaling on Repurposed Hardware
TL;DR
This work examines the impact of limiting active cores on repurposed nodes and introduces deep C-state power-gating, fully saturated workloads, and hardware-level power measurements to address viability in complex applications such as OpenFOAM.
Abstract
Many resource-constrained environments rely on repurposed hardware for High-Performance Computing, shifting costs from capital expenditure to operational energy costs. As a result, evaluating system viability in resource-constrained environments warrants a shift from measuring raw performance to evaluating Productivity-to-Energy efficiency. Memory-bound workloads are particularly impacted by the memory wall, where stalled processors waste energy. While Dynamic Voltage and Frequency Scaling is widely used, systematic core scaling remains largely overlooked. This work examines the impact of limiting active cores on repurposed nodes. Presenting Phase 1 preliminary results, initial HPCG benchmarking demonstrates that targeted core deactivation yields a 62.5% improvement in PTE efficiency over maximum-performance baselines. To address viability in complex applications such as OpenFOAM, a second phase introduces deep C-state power-gating, fully saturated workloads, and hardware-level power measurements. The resulting framework provides a practical, software-driven approach to lowering Total Cost of Ownership and advancing sustainable High-Performance Computing in resource-constrained settings.