System modeling of a photonic integrated circuit–based coherent imager using pupil-plane sampling

Abstract

Conventional imaging systems rely on large bulk optics to collect and focus light, resulting in significant con- straints on mass, volume, alignment, and scalability. Most of this mass and volume is taken up by a meter-size primary mirror and meters of propagation to form an image, which can only be sensed with intensity. This work presents a photonic integrated circuit (PIC)-based coherent imaging approach that directly samples the optical field in the pupil plane and performs the image formation computationally. Free-space light is coupled into an array of planar photonic chips using surface grating couplers. Each chip has an array of couplers, and a scalable array of chips across a flat plane samples the entire pupil, conceivably meters in extent. With the distribution of a coherent local oscillator to each coupler, heterodyne detection measures both amplitude and relative phase across the array. The proposed architecture employs balanced photodetectors and directional couplers to enable phase-sensitive detection while suppressing common-mode noise and relaxing optical path-length matching requirements. System calibration will be required to account for all optical path differences between pixels due to fabrication error, alignment error, and any other systematic errors. Furthermore, variations in coupling efficiencies, wavelength effects, and segment-to-segment phasing must be accounted for when predicting system level performance. The numerical model incorporates both deterministic geometric phase effects and stochastic signal properties arising from finite detector bandwidth. For stellar sources, the finite bandwidth introduces temporal coherence effects that reduce correlation between pixels separated by path delays exceeding the coherence time, leading to point spread function degradation that must be accounted for in system design. This paper presents results from system level performance modeling that predict sensitivities to fabrication and alignment errors, which in turn will guide tolerances required for a realistic system. The model creates a scalable array of chips, and each chip is an array of cells, where each cell is the grating coupler with heterodyne detection. Physical parameters are taken from the chips used in the laboratory demonstration. System level performance includes such metrics as Strehl ratio, bandwidth, and field of view.