Memory-Free Streaming FPGA Accelerator for Quantized 1D CNN-Based ECG Arrhythmia Classification

Abstract

This paper presents a memory-free streaming FPGA accelerator for quantized 1D CNN-based ECG arrhythmia classification, i mplemented u sing Q uantization-Aware Training (QAT) and compiled through the FINN dataflow framework. The proposed architecture stores all weights on-chip and streams intermediate activations directly between layers without external feature-map buffering, enabling deterministic low-latency inference and reduced switching activity. The accelerator is implemented on a Xilinx Zynq UltraScale+ ZCU104 evaluation board and achieves timing closure at 100 MHz with low resource utilization (2.75% LUT, 4.17% DSP). Post-route power analysis reports 0.071 W dynamic power and 0.663 W total on-chip power. On-board validation using the MIT-BIH Arrhythmia Database achieves 98.71% classification a ccuracy, m atching the software reference model. In addition, we quantify latency, throughput, and energy-per-inference metrics to evaluate the suitability of the proposed design for wearable edge healthcare systems.