It is shown that multi-bit packets, rather than spikes, are the most efficient communication strategy in packet-switched networks and that compared to basic numerical integration methods, higher-order differential equation solvers decrease both computation and communication costs while achieving lower numerical error, but that these benefits are ultimately limited by arithmetic precision.
Abstract
Neuromorphic computing is closely associated with spiking neuronal networks. However, an alternative class of so-called"rate-based"models arising from computational neuroscience and machine learning forgoes spiking interactions and instead relies on continuous coupling between neurons. Existing neuromorphic implementations designed around spike-based interactions are not well-suited for emulating such models. Here view the distributed simulation of these models as message-passing algorithms on parallel hardware. Leveraging prior art in numerical algorithms and distributed simulation, we outline steps that enable the design of efficient digital neuromorphic accelerators for non-spiking neuronal models. In particular, we show that multi-bit packets, rather than spikes, are the most efficient communication strategy in packet-switched networks and that compared to basic numerical integration methods, higher-order differential equation solvers decrease both computation and communication costs while achieving lower numerical error, but that these benefits are ultimately limited by arithmetic precision. Using our proposed design principles, we convert an existing neuromorphic architecture into a distributed numerical solver - a spikeless neuromorphic system - for continuously-coupled neuronal models. We thereby demonstrate that our theoretical considerations indeed translate into practical advantages, namely reduced energy consumption and delay.
Four error-detection and fault-tolerance methods developed specifically for spiking systems are developed and implemented on QUANTISENC, an open-source digital spiking neuromorphic core, executing standard image-classification workloads.
This survey reviews 71 studies published between 2015 and 2025 and organizes them into a taxonomy that classifies GPU works into simulation frameworks, training-acceleration techniques, large-scale and multi-GPU simulation, and application deployments, and RISC-V works into instruction-set extensions and tightly-couple...
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The view taken here is that brain-inspired computing is heading toward a hybrid future: conventional digital processors will keep doing what they do best, while event-driven and in-memory accelerators take over the workloads where they have a genuine edge.
Jisna C. Jeejo, Habeeba M. A.· International Journal of Tec...· 0 citations
This work introduces their symmetric counterpart by replacing adaptation with slow self-excitation, motivated by intrinsic calcium-mediated membrane currents, and derives and validate a mean-field neural mass model that remains stable while retaining working-memory functionality.
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A high-performance hardware implementation of large-scale neuromorphic system to investigate anesthetic-induced neural dynamics and paves the way for advanced brain–machine interfaces and closed-loop anesthetic delivery systems.
Chuan-Guang Wang, Xiao-Tian Pan, Si Chen et al.· Frontiers in Systems Neurosc...· 0 citations