Development of a Time-Synchronised Micro-PMU System for Low-Voltage Grid Fault Prediction

Abstract

This paper presents the design and experimental validation of a micro-phasor measurement unit (uPMU) system developed for real-time protection and power quality analysis in low-voltage distribution networks. The proposed architecture integrates a Raspberry Pi-based Central Protection Unit, an AD7606 synchronous analog-to-digital converter for high-speed multi-channel sampling, and a DAC8568 digital-to-analog converter for test and simulation purposes. The system supports hardware time synchronization via the Precision Time Protocol (PTP) and enables both real and simulated grid event measurements. Experimental results confirm the feasibility of achieving up to 200~kSPS sampling per channel, providing the temporal resolution required for sub-cycle fault detection. The long-term objective is to apply artificial intelligence (AI) techniques to predict the next waveform samples and detect deviations that indicate faults or abnormal grid conditions within microseconds.