Jul 2026· 2026 IEEE International Conference on Quantum Software (QSW)· pp. 129-140· 2 citations· 40 references
Abstract
Modern High-Performance Computing (HPC) infrastructures are increasingly integrating multiple Quantum Processing Units (QPUs) of different types alongside classical resources. Unlike traditional accelerator scheduling, quantum device selection affects not only performance but also the quality of the computed result because current quantum hardware exhibits device-dependent noise characteristics. This makes efficient and fidelity-based device selection a key challenge in multi-QPU environments. In this work, we propose a Graph Neural Network (GNN) model that exploits the structural representation of quantum circuits to predict their execution fidelity across different QPUs. By operating on uncompiled circuits, the approach supports earlystage device selection and enables making informed scheduling decisions. We evaluate the model on a diverse set of benchmark circuits compiled for superconducting and trapped-ion devices. The results show that the proposed approach outperforms existing baseline models, achieving 30% Mean Squared Error (MSE) and 20% Mean Absolute Error (MAE) reduction, and provides an effective basis for fidelity-based scheduling in heterogeneous HPC-quantum systems.
A low-overhead fidelity-aware scheduling framework for multi-QPU systems based on a Graph Neural Network that estimates, before compilation, the expected fidelity of each circuit on each available QPU, and a tunable scheduler uses these estimates to control the trade-off between execution fidelity and parallelism.
Innocenzo Fulginiti, Antonio Tudisco, Salvatore Zammuto et al.· 0 citations
These quantitative findings demonstrate that tightly coupled hybrid co-processing, physically adjacent to the control electronics, is critical for extending the computational bound of Noisy Intermediate-Scale Quantum (NISQ) devices.
Akshay Joseph, R. Delhibabu· Frontiers of Computer Scienc...· 0 citations
Results indicate that post-transpilation information is useful, while the value of explicit graph modeling depends on the backend and optimization level, and under backend-specific evaluation, the advantage of GNN decreases, with conventional regression models matching or outperforming the GNNs in several settings.
Davud Azizov, Javier Vela-Tambo, Tian Guo· 0 citations
This work formalizes CLOPS_h (Circuit Layer Operations Per Second) as a holistic speed benchmark defined over layered, hardware-aware circuits, and shares its layer decomposition with scalable layer-fidelity (LF) quality benchmarks, enabling coherent interpretation of speed and quality without conflating the two.
A noise-aware emulation framework that propagates the dominant noise mechanisms throughout the full computation cycle to predict device behavior and establishes a foundation for verifying analog processors in regimes beyond classical reach is presented.
Constantin Dalyac, Sergi Julia-Farr'e, L. Leclerc et al.· 3 citations· ⚡1
A novel physics-guided linear mapper for quantum error mitigation that uses seven distinct interpretable features derived from circuit complexity and device calibration data, which reveals that circuit depth and CNOT count dominate error prediction, consistent with decoherence mechanisms.
Tulsi Chaudhari, Krish Bhatia, Shalini Devendrababu et al.· Lecture Notes in Networks an...· 0 citations
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