Sep 2026· IEEE Journal on Miniaturization for Air and Space Systems· Vol 7, pp. 334-347· 0 citations· 49 references
Abstract
Verification and validation (V&V) campaigns for satellites commonly rely on FlatSat platforms to access critical electrical and communication interfaces before final integration. For CubeSats, an ideal platform should be compact and minimize reliance on external instrumentation. Existing solutions often rely on external instrumentation or on simple passive backplanes, whereas more integrated alternatives tend to be proprietary, closed-source, and costly. To address this gap, this article introduces an open-source FlatSat platform that combines bridge- and dock-type architectures, including a set of fully integrated features, such as embedded current and temperature sensors, hardware- and software-based fault injection, and a reconfigurable system-on-module (SoM) running a custom Linux distribution for flexibility and multimission adaptability. The platform was validated through practical, lab-based scenarios using representative CubeSat subsystems. These tests confirmed its ability to emulate missing subsystems, conduct on-orbit scenario simulations and emulations, and perform unified monitoring and logging of sensor and telemetry data without the need for external instrumentation; this establishes it as a practical and reusable solution for advanced V&V, particularly in academic settings. Design files, firmware, and software are publicly available to promote reproducibility and adaptation.
Advancing open, cost-effective, and standards-compliant 5G standalone (SA) platforms is essential for reproducible experimentation, rapid prototyping, and applied research with direct relevance to real-world deployments and industrial-scale testing. This paper presents Open5GBox, a fully deployable and open-source platform for 5G SA networks that integrates the radio access network (RAN) and core network (CN) functions using only commercial off-the-shelf (COTS) hardware and open-source software. The system combines srsRAN and Open5GS stacks into a modular architecture that supports both embedded and general-purpose compute platforms, including deployments on Raspberry Pi 5 and x86-based systems. The RAN and CN components can be decoupled and securely interconnected via a WireGuard virtual private network, enabling scalable, real-world 5G SA experimentation. Extensive experimental validation is performed across five deployment configurations, evaluating key performance indicators such as throughput (up to 212 Mbps on downlink (DL), 97 Mbps on uplink (UL)), with average latency of approximately 30 ms, jitter consistently under 5 ms, modulation and coding scheme (MCS), channel quality indicator (CQI), and signal-to-noise ratio (SNR) under various bandwidths (20/40/60 MHz). The system supports voice over new radio (VoNR) session continuity and intra-system mobility, and complies with 3rd generation partnership project (3GPP) emission masks, as confirmed by spectrum analysis. Results demonstrate that Open5GBox enables reproducible, standards-compliant, and portable 5G SA deployments and bridge the gap between simulation-based testbeds and real-world 5G SA experimentation, offering a low-cost, open, and scalable platform for next-generation wireless systems.
Ciprian Zamfirescu, Daniel Burmaz, Radu Iugulescu et al.· IEEE Access· 0 citations
Satellite flight software (FSW) requires extremely high reliability and robustness, since any software fault occurring after launch can directly result in mission failure. Therefore, onboard reprogramming capability that enables software correction and update during in-orbit operations is essential. This paper analyzes the FSW reprogramming architecture implemented in the onboard computer (OBC) and presents a structured procedure and verification methodology for performing reliable software updates in orbit. To support dependable reprogramming, key FSW design requirements are identified, including resource margin, parameter handling, linking mechanism, fault detection and correction, and compiler/linker considerations. Both SDRAM-based and non-volatile memory (NVMEM)-based reprogramming methods were implemented and evaluated using a KOMPSAT flight software simulator (FSS) based on a GR740 processor emulator and a ground test facility. The results demonstrate that both approaches successfully perform code patching and system reconfiguration, confirming the feasibility of in-orbit FSW updates. This work is expected to enhance mission reconfiguration capability for next-generation satellites and contribute to improving the reliability and maintainability of onboard software update technologies.
Da-Yeon Kim, Jong-wook Choi· 2026 6th International Confe...· 0 citations
This work proposes and experimentally validates a structured development flow from rapid prototyping to printed circuit board (PCB) implementation for embedded systems operating in constrained environments. The approach is applied to a battery pack monitoring system for sounding rockets, and it is responsible for acquiring voltage, current, and temperature data and transmitting telemetry via an RS-422 interface at 38.4 kbps. The methodology starts with the integration of commercially available modules and evolves to a custom PCB while preserving the validated functional architecture. Experimental validation was conducted through bench and tri-axial vibration tests, demonstrating consistent system performance in sensing, processing, and telemetry, with no observed signal degradation or discontinuities. The results confirm that the proposed approach preserves system functionality and reduces development uncertainty, while providing a clear framework for design stages, validation procedures, and component selection. Furthermore, the findings support the use of low-cost commercial off-the-shelf (COTS) components in non-critical applications when appropriate validation strategies are applied, while emphasizing the need for additional qualification for critical use cases. The development flow is explicitly designed to support TRL progression, such that the evidence accumulated at each stage provides the traceability required for future qualification under critical classification.
Carlos Renato dos Santos, Adriano Costa Pinto, V. Leite et al.· Hardware· 0 citations
University CubeSat programs are often conducted under severe constraints in budget, personnel, schedule, and knowledge continuity, while still requiring sufficient verification to support mission success. This paper presents the verification, testing, on-orbit operation, and anomaly analysis of COSMIC, a 3U university CubeSat developed by Yonsei University in less than eleven months from project kickoff to launch. COSMIC adopted a protoflight model approach, prioritized commercial off-the-shelf components with flight heritage and prior laboratory experience, and concentrated limited resources on subsystem, FlatSat, system-level, environmental, communication, and scenario-based testing. The test program is reviewed against the subsequent on-orbit results to identify which verification activities contributed to anomaly prevention, fault isolation, and recovery. The results show that system-level integration testing, thermal vacuum cycle testing, and scenario testing were particularly effective in revealing interface, software, and deployment-related issues before launch and in supporting early orbit recovery. However, the mission also exposed limitations in recovery-logic verification, long-duration software testing, communication robustness, and independent reset paths. Based on these findings, practical recommendations are derived for resource-constrained university CubeSat teams seeking to tailor verification activities without simply reducing test rigor.
Dohyeon Park, Youngho Eun, Sang-Young Park· Aerospace· 0 citations
The growing adoption of Commercial-Off-the-Shelf (COTS) components in space applications necessitates addressing performance and reliability challenges in radiation-intensive environments. Field-Programmable Gate Arrays (FPGAs), widely employed in these systems, offer exceptional computational capabilities but are vulnerable to radiation-induced faults, such as Single Event Upsets (SEUs), which can cause unpredictable behavior or even system failure. This paper presents a solution for enhancing the reliability of FPGA cluster-based systems through two custom-designed hardware solutions, the beacon controller and the robust bus, as well as error correction and workload redirection mechanisms. They have been integrated into an FPGA computing cluster for space telecommunication applications and tested against radiation-induced effects by fault injection techniques and radiation test campaigns. Experimental results demonstrated that the proposed techniques significantly reduce the system downtime, achieving up to 99% system availability, and reduce the radiation-induced failure rate effects below 4%. These results validate the proposed mitigation strategies as a robust and reliable approach for ensuring system dependability in harsh environments, demonstrating excellent performance through a fully FPGA-based design that eliminates the need for external controllers, unlike most state-of-the-art solutions.
Giorgio Cora, Daniele Rizzieri, C. De Sio et al.· IEEE transactions on compute...· 1 citation
Accurate power measurement is not only essential for evaluating the energy efficiency of modern embedded and semiconductor systems, but power draw is an important proxy during stress testing. Industrial semiconductor test equipment, however, is often expensive and difficult to integrate into flexible experimental workflows. This paper presents a compact and extensible hardware platform for automated system-level power measurement of embedded devices. The proposed setup integrates a Raspberry Pi controller, a precision current measurement device, and a microcontroller-based Device-under-Test (DUT). The system supports automated firmware deployment, synchronized device execution, and high-resolution current acquisition. A lightweight HTTP-based interface allows remote clients to upload firmware binaries and retrieve measurement results. This design enables automated benchmarking and reproducible experiments across multiple firmware variants. The platform is implemented using accessible hardware components and open-source software tools, making it suitable for research, prototyping, and educational environments. We describe the architecture of the platform, the automated testing workflow, and potential application scenarios, including firmware energy profiling and regression testing.
Linus Bantel, Sarah Rottacker, Dirk Pflüger· 0 citations
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