Experimental results validate that VCSRT achieves substantial reductions in worst-case allocation latency and worst-case execution time of high-priority tasks under heavy load, and maintains microsecond-level response jitter stability across all load levels.
Abstract
The shift toward the Industrial Internet imposes new requirements on industrial edge runtime systems for rapid resource configuration and dynamic application deployment. However, existing embedded and real-time runtimes suffer from low efficiency and redundant logic in dynamic physical memory management, which can hardly meet the deterministic demands of industrial mixed-criticality scenarios. To address these limitations, this paper proposes VCSRT, a hardware-assisted virtual memory mapping framework tailored for industrial edge scenarios. It integrates three core components: an optimized Lazy Buddy system for on-demand memory allocation, Extended Page Table (EPT)-based hardware-accelerated address translation, and priority-aware scheduling adapted to industrial workloads. By eliminating the architectural redundancy of conventional virtual memory stacks, VCSRT substantially improves memory allocation efficiency and deterministic resource provisioning. Experimental results validate that VCSRT achieves substantial reductions in worst-case allocation latency and worst-case execution time of high-priority tasks under heavy load, and maintains microsecond-level response jitter stability across all load levels. The proposed framework can provide efficient and deterministic memory resource support for industrial edge dynamic reconfiguration applications.
A hardware-software co-design framework that unifies distributed compute, memory, and communication into a seamless processing-communication fabric is presented and a prefill-decode disaggregation approach that dynamically reconfigures PE organizations to maximize resource utilization is presented.
This paper introduces a job-level dynamic cache allocation strategy for multicore systems in which critical real-time tasks execute on a dedicated core while sharing the LLC with best-effort workloads executing on the remaining cores.
A memory sensitive Q-learning (MSQL)-based task scheduling method for heterogeneous cloud environments that significantly reduces makespan while improving CPU and memory utilization, particularly under memory-intensive scenarios.
Yang Li, Xin-Hong Hei, Qiao Sun et al.· Journal of Supercomputing· 0 citations
CrocSort is presented, a byte-balanced parallel external merge sort with configurable memory and per-phase thread settings with practical resource-configuration rules for selecting these settings from input size, memory budget, and thread cap.
Riki Otaki, Charles Benello, Fuheng Zhao et al.· Proceedings of the VLDB Endo...· 0 citations
RunSoC 2.0 improves the realism of early-stage MPSoC analysis while retaining practical solution times for large automotive workloads, and incorporates cluster-aware communication and memory modeling.
D. Krüger, Lucas Mauser, Stefan Wagner· 0 citations
We use cookies to run the site and, with your consent, for analytics and to show ads.
See our Cookie Policy.