Sep 2026· Small· pp.
e75550
· 0 citations· 41 references
Medicine
TL;DR
This work establishes a materials-driven approach to compact, low-power, and intrinsically secure in-memory hardware architectures for next-generation Internet-of-Things applications.
Abstract
Memristor-based hardware security primitives have attracted attention owing to their intrinsic variability and stochastic switching dynamics; however, most prior demonstrations implement physical unclonable functions (PUFs), true random number generators (TRNGs), and cryptographic operations as functionally separated modules. Here, we present a unified hardware security platform in which PUF, TRNG, and in-memory encryption are co-realized within a single memristor crossbar array. Post-fabrication annealing reshapes the high-resistance-state landscape into a stable dual-entropy material state, simultaneously enabling static device-to-device variability for PUF operation and dynamic random telegraph noise for TRNG generation. Leveraging this entropy-engineered landscape, vector-matrix multiplication-based encryption is directly implemented within the array and combined with lookup-table-assisted decryption, allowing encryption to operate as an intrinsic in-memory physical process. The integrated system demonstrates collision-resilient encryption, robust decryption under device variations, high-quality randomness, and reliable privacy-preserving mutual authentication. This work establishes a materials-driven approach to compact, low-power, and intrinsically secure in-memory hardware architectures for next-generation Internet-of-Things applications.
The necessity for strong and inherent security methods in contemporary integrated circuits has increased due to the expanding number of linked systems and the growing threat of hardware-level assaults. True Random Number Generators (TRNGs) and Physically Unclonable Functions (PUFs) have become important hardware securi...
Rajesh Kumar Jha· International Journal of Nan...· 0 citations
The security of modern electronic systems is increasingly grounded in the physical properties of hardware, rather than on purely algorithmic assumptions. In this context, passive circuit elements with memory, commonly referred to as mem-elements, have emerged as promising candidates for implementing hardware-based secu...
Francisco J. Romero, Shayma Habboush, Seyedehsomayeh Hatefinasab et al.· Frontiers in Electronics· 0 citations
As the deep integration of the Internet of Things (IoT) and artificial intelligence (AI) technologies has rendered traditional encryption techniques increasingly inadequate in terms of security strength, the implementation of hardware-level security solutions has been identified as a critical issue in the design of inf...
Zi-Han Zhong, Chen-Qi Dai, Guang-Fu Luo et al.· Micromachines· 0 citations
With the increasing demand for secure IoT communications, memristor-based true random number generators (TRNGs) provide promising hardware security solutions. Here, a TiN/LiSiOx/Pt memristor array is demonstrated as an intrinsic entropy source for TRNG applications. The device exhibits stochastic resistive switching wi...
Yong-Yue Xiao, Zi-Han Zhong, Yun-Hui Chen et al.· IEEE Journal of the Electron...· 0 citations
The critical impact of device selection on the overall performance of PUFs is revealed and the dual impact of Multi-Level Cell technology on PUF performance is dissected and the "computation-security integration" architecture based on the deep convergence of Computing-in-memory and PUFs is discussed.
Peizhen Hong, Zhixin Ren, Gui-Qin Li et al.· International Journal of Inf...· 0 citations
Sneak-path leakage blocks large-scale passive memristor crossbar integration, making rectifying memristors essential to address this bottleneck. Herein, we develop a self-rectifying memristor (SRM) with an Ag/FABi3I10/ITO device architecture based on FABi3I10 active layers. Because of the regulatory effect of the spo...
Tai-Yuan Chai, Xu Han, Long Chen et al.· Journal of Physical Chemistr...· 0 citations
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