Faster than the Speed of BRAM: In-Memory Computing for Next Generation FPGAs

Performance Analysis of In-Memory Computing Static Random Access Memory Array for Neural Network

A TPU-like Design for FPGA Benchmarking

A 64-bit high-precision flash computing-in-memory architecture with a parallel input scheme

This work presents a novel parallel input scheme for high-precision computing in flash-based CIM with high bit-density (4 bits/cell) and provides a feasible approach to constructing a high-precision CIM architecture.

Toki: Profiling HBM Performance on FPGA Systems with RISC-V Soft Cores and PCIe Host DMA Traffic

Toki is the first hardware-software framework that enables profiling the performance of HBM on FPGA accelerator cards by jointly considering the execution of workloads on RISC-V soft cores instantiated on the FPGA and the injection of memory traffic from the host system via DMA over PCIe, providing insights that cannot...

A Reconfigurable 11T SRAM Compute-in-Memory Architecture for Dual-Mode MAC Operations

Current trends in hardware design for artificial intelligence and machine learning algorithms impose limits on traditional Von Neumann architectures due to the memory wall problem. Hence, researchers are focusing on versatile memory design and in-memory computing (IMC) architectures. The standard 6T SRAM cell is small...

MPTAC: Memory Controller Partitioning and Traffic-Aware Contention Control in GPUs

The advent of cloud-based artificial intelligence and the increased digitalization of embedded systems require powerful GPUs capable of simultaneously running kernels from different software providers. To accommodate the resource isolation and Execution Time Determinism (ETD) needed with the increasing number of kernel...