High-frequency design and verification of subway auxiliary inverter based on SiC MOSFET and T-Type three-level topology

Abstract

This paper proposes a high-frequency DC/AC inverter design using full-SiC MOSFETs and a T-type three-level topology to address the large volume and low power density of traditional subway auxiliary inverters. To further reduce the passive filter volume in two-stage isolation architectures, the switching frequency is elevated to 30 kHz. A hardware-collaborative PWM mechanism combining saddle-wave modulation with DMA is implemented to reduce the computational burden during high-frequency operation. Tests on a 60 kVA prototype demonstrate that the proposed architecture eliminates the 600 kg line-frequency transformer, reducing system volume by 40% and weight by 50% compared to the traditional IGBT schemes, while maintaining good dynamic stability during load transients. The experimental results validate the feasibility of the proposed high-frequency auxiliary inverter.