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A. Venkat

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Open access Oct 2026

JumpStart: Alleviating the Front-End Bottleneck in Modern x86 Processors

With the stagnation of single-threaded performance, the need for optimizations targeting sequential code performance is greater than ever before. Modern workloads have also been growing in code footprint, exposing a bottleneck in the processor front-end, specifically its inability to maintain a sufficiently high fetch...

Logan Moody, B. Godala, Gilles A. Pokam et al. · 0 citations
Preprint Aug 2026

SoK: ARCUS: On the Efficiency and Efficacy of Hardware Fuzzing

This work presents a comprehensive analysis of contemporary hardware fuzzing techniques applied across three major abstraction layers: Instruction Set Architecture (ISA), microarchitecture, and Register-Transfer Level (RTL). Our study examines key factors including input stimulus quality, mutation strategies, feedback...

Alenkruth Krishnan Murali, Raghul Saravanan, D. SaiManojP et al. · 1 citation

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