BHARAT-TPM: Micro-Architecture Design of AXI Enabled HMAC SHA-3 Hardware Accelerator for a RISC-V Trusted Platform Module
Trusted Platform Modules (TPMs) have become essential components of contemporary hardware security, and implementations must include cryptographically robust algorithms such as SHA-3 and HMAC. Dedicated hardware accelerators for these algorithms are needed for high performance in TPM operations, including key derivatio...