Aiswarya K

An Area-Efficient CNN Accelerator for Handwritten Digit Recognition on FPGA-Based Edge Systems

This paper describes a compact convolutional neural network (CNN) accelerator for handwritten digit recognition on the Xilinx PYNQ-Z2 platform. The proposed network architecture comprises two shallow convolutional layers (2 filters each) and two fully connected layers (12 neurons, then 10 neurons), with exactly 4,936 t...