Open access
Sep 2026
Hardware–Algorithm Co-Optimization of Weight-Update Protocols in Oxide-Based Synaptic Transistor Arrays for Neuromorphic Systems
This work provides an experimentally calibrated behavioral simulation platform and concrete algorithm-hardware co-design guidelines for future neuromorphic hardware, prioritizing synaptic devices with long-term depression > 0, a moderately elevated Gmin, and asymmetric resource allocation toward LTD-side optimization.
Yi-Xin Cao, Jing Xia, Xiang-Yi Ding et al.
· Micromachines · 0 citations