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Author

Duy-Anh Nguyen

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Open access 2026

Resource-Aware Co-Design of Spiking Neural Networks for Intelligent Structural Health Monitoring on Edge FPGAs

A Hardware–Software Co-Design Framework that enables deployment of a Spiking ResNet-18 for automated crack detection on a Xilinx KV260 edge FPGA, and develops Channel Folding, a novel High-Level Synthesis (HLS) architecture reducing intermediate buffers by 4 × .

V. Pham, Quan A. Pham, van-Vu Luyen et al. · 0 citations

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