Author

Érica F. Cota

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Open access Sep 2026

Comparative Analysis of Formal and Simulation-Based Verification Techniques for Digital Circuits

The results indicate that no single technique is universally superior and that combining formal verification with UVM leads to greater robustness and efficiency in the validation process.

Ítala Lorrane Silva Couto, Érica F. Cota · Journal of Integrated Circui... · 1 citation