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Author

Hua-Xi Gu

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Oct 2026

R$^{2}$PIAC: A Runtime Reconfigurable Photonic Interconnect Architecture for Chiplet-Based DNN Accelerators

The continued scaling of deep neural networks (DNNs) is driving accelerator architectures toward chiplet-based integration. However, conventional fixed and workload-level optimized topologies do not track fine-grained, time-varying communication during DNN inference, resulting in multi-hop latency and link congestion....

Xun Nie, Hua-Xi Gu, Rui-Zhen Pan et al. · 0 citations
Sep 2026

How Fast Should an Optical Circuit Switch Reconfigure for MoE Inference?

Mixture-of-experts inference introduces fine-grained, dynamically changing many-to-many communication for token dispatch and collection, making serving latency highly sensitive to the interconnect. Optical circuit switching (OCS) offers an optically transparent data plane, but its benefits for MoE depend critically on...

Shuo Li, Hua-Xi Gu, Yi-Xuan Hao et al. · 0 citations
2026

TopoCrafter: Toward Highly Reliable Optical-Circuit-Switched HPC/AI Interconnects via Dual-Agent DRL

Optical-circuit-switched interconnects have become one of the core components for AI training due to their flexible topology reconfiguration. In contrast to the applications carried by traditional data center networks, large-scale language model training is highly sensitive to network failures, where frequent disruptio...

Liang Qin, Xing-Yu Liu, Wen-Ting Wei et al. · 0 citations

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