Open access
Sep 2026
Design and analysis of an ultra-low-power dual edge-triggered D flip-flop for high-speed applications
In contemporary very large scale integration (VLSI) designs, flip-flops consume a substantial amount of power due to the constant switching of the clock. Consequently, designing energy-saving storage devices has become necessary for both mobile and high-performance digital systems. This paper introduces an ultra-low-po...
Komal Gupta, Pudi Harikrishna, D. Vaithiyanathan et al.
· Engineering Research Express · 0 citations