Skip to content

Author

Mruthika N.

1 paper indexed here

We haven’t gathered this author’s papers yet. Follow them and we’ll fetch their work.

Not the right person? Other researchers publish under this name.

Review Open access Aug 2026

A Survey of AES-256 and SHA-256 Hardware Architectures on FPGA

It can be deduced that an efficient resource usage, scalability and secure hardware implementation is possible by integrating the AES-256 and SHA-256 components into a modular FPGA architecture.

V. G, Bharathi Gururaj, Mruthika N. et al. · 0 citations

We use cookies to run the site and, with your consent, for analytics and to show ads. See our Cookie Policy.